Reductions in power consumption in electronic devices such as a personal computer, an information processing device, etc. are an important issue at all times. Generally, in a semiconductor integrated circuit (LSI) used in such electronic devices, power consumption accompanying, for example, a data transfer on a relatively long-distance wire between the LSI and the outside of the LSI is high. For example, with a CMOS LSI, high power is consumed at the moment when the value of an output signal changes.
FIG. 1 is an explanatory view of an example of a conventional 2-bit data transfer system. In this conventional example, two long-distance wires are used to transfer 2-bit signals A[0] and A[1], transmission data output, for example, via inverters 1000 and 1001 are transferred by long-distance wires 101, and the data is output as 2-bit data C[0] and C[1] via inverters 1020 and 1021 on a receiving side. Such a conventional system has a problem that power consumption required for a data transfer increases with an increase in the number of bits of data, namely, a data bus width.
Patent Document 1 as a typical technique for reducing power consumption required for such a signal transfer discusses a signal transfer apparatus that reduces power consumption by inverting/non-inverting the polarity of original data to be transferred so as to decrease a temporal change in the data to be transferred, and by transferring the result of inverting/non-inverting the data to which polarity indication data indicating whether or not the data is inverted is added.    Patent Document 1: Japanese Laid-open Patent Publication No. 08-314589 “Signal Transfer Apparatus”